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MH1RT QualPack
Qualification Package
MH1RT Sea of Gates
Radiation Tolerant 0.35 m CMOS
MH1RT Sea of Gates
0.35 m CMOS for Space Environment QualPack
Rev.2 - Jan. 2002 1
MH1RT QualPack 1. Table of Contents
1. 2. 3. Table of Contents ................................................................................................................................................ 2 General Information ........................................................................................................................................... 3 Technology Information .................................................................................................................................... 4 3.1 3.2 3.3 4. 4.1 4.2 Wafer Process Technology ........................................................................................................................ 4 Product Design ........................................................................................................................................... 5 Cross Section............................................................................................................................................... 6 Qualification methodology ........................................................................................................................ 7 Qualification test methods ......................................................................................................................... 8
Qualification........................................................................................................................................................ 7
4.3 Wafer Process Qualification...................................................................................................................... 9 4.3.1 Wafer Level Reliability....................................................................................................................... 9 4.3.2 Hot carrier qualification ....................................................................................................................... 9 4.3.3 Electromigration................................................................................................................................. 10 4.3.4 Product Reliability Results................................................................................................................. 12 4.4 Product Qualification............................................................................................................................... 13 4.4.1 Device reliability................................................................................................................................ 13 4.4.2 Packaging Reliability ......................................................................................................................... 14 4.5 Qualification status: ................................................................................................................................. 14
4.6 Irradiation................................................................................................................................................. 15 4.6.1 Conditions and Chronology ............................................................................................................... 15 4.6.2 Results................................................................................................................................................ 16 4.6.3 Irradiation summary ........................................................................................................................... 16 4.6.4 Irradiation test records........................................................................................................................ 17 5. 6. Environmental Information.............................................................................................................................. 20 Other Data ......................................................................................................................................................... 21 6.1 6.2 ISO9001 and QS900 Certificates ............................................................................................................ 21 Data Book Reference................................................................................................................................ 22
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2. General Information
Product Name: Function: MH1RT ASIC Sea of Gates 1.6 million gates, 596 pins 200 KRAD Total Dose capability
Wafer Process: Available Package Types
CMOS 0.35m Rad Tolerant, 4 metal levels PQFP, PowerQuad, L/TQFP,PLCC, PBGA, Super PBGA CPGA,CQFP, MQFPF, CLGA
Other Forms: Die, Wafer
Locations: Process Development Product Development Wafer Plant QC Responsibility Probe Test Assembly Final Test Lot Release Shipment Control Quality Assurance Reliability Testing Failure Analysis
Atmel Rousset, France Atmel Nantes, France Atmel Nantes, France Atmel Rousset, France Atmel Nantes, France Atmel Nantes, France Atmel Grenoble, France (except plastic) Atmel Nantes, France Atmel Nantes, France Atmel Nantes, France Atmel Nantes, France Atmel Nantes, France Atmel Nantes, France
Quality Management Atmel Nantes, France
Signed: Pascal LECUYER
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MH1RT QualPack 3. Technology Information
3.1 Wafer Process Technology
Process Type (Name): CMOS 0.35m Rad Tolerant
Base Material: Silicon Epi Substrate Wafer Thickness (without back grinding) 725m Wafer Diameter 200mm Number Of Masks Gate Oxide Material Thickness 15
Silicon Dioxide 70A (optical for 3.3V)
Polysilicon Number of Layers Thickness Metal Number of Layers Material: Layer 1/3 Thickness Upper layer Thickness Passivation Material Thickness
1 3200A
up to 4 Ti TiN AlCu 400A + 800A + 5000A + 100A Ti + 1000A TiN 400A + 800A + 8000A + 250A TiN
SiO2/Si3N4 11000A / 10000A
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3.2 Product Design
Pad size opening Logic Effective Channel Length Gate Poly Width Gate Poly Spacing Metal 1 Metal 1 Metal 2 Metal 2 Metal 3 Metal 3 Metal 4 Metal 4 Width Spacing Width Spacing Width Spacing Width Spacing 80m * 100m 0.35m 0.35m 0.49m 0.42m 0.49m 0.56m 0.49m 0.56m 0.49m 0.56m 0.49m 0.35m 0.49m 0.42m 0.42m
Contact Size Contact Spacing Via 1 Size Via 2 Size
Test Vehicles: Die Size: Pad Size Code: Mask: Number of metal levels: Die Size: Pad Size Code: Mask: Number of metal levels: Die Size: Pad Size Code: Mask: Number of metal levels: 5280*8130 (42.9mm) 80m * 100m EV29 A5500 3 13097*13097 (169.78mm) 80m * 100m DRAF (MH242S) A5544 4 6601*6601 (30.9mm) 90m * 90m 65809E A5552 3
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3.3 Cross Section
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MH1RT QualPack 4. Qualification
4.1 Qualification methodology
All product qualifications are split into three distinct steps as shown below. Before a product is released for use, successful qualification testing are required at wafer, device and package level. Wafer Level Reliability consists in testing individually basic process modules regarding their well known potential limitations (Electromigration, Hot Carriers Injection, Oxide Breakdown, NVM Data Retention). Each test is performed using wafer process specific structures. Device reliability is covering either dice design and processing aspects. The tests are performed on device under qualification, but generic data may also be considered for reliability calculation. For each package type proposed in the Datasheet, it is verified that qualification data are available. If not qualification tests are carried out for the new package types. In addition, one package type is selected to verify packaging reliability of the device under qualification.
Product Qualification
Wafer Level
Device (Design / Process)
Packaging
Reliability
Reliability
Reliability
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4.2 Qualification test methods
General Requirements for Hermetic CMOS ICs
Standard MIL-STD 883
Test Description QCI Group C Electrical Life Test (Early Failure Rate) 2000 hours 140C
Acceptance 0/45 352h class B 0/45 700h class S
MIL-STD 883 Method 2016 MIL-STD 883 Method 2004 condition B2 MIL-STD 883 Method 1011 Method 1010 cond. C Method 1004 MIL-STD 883 Method 2002 Method 2007 Method 2001 MIL-STD 883 Method 1009 MIL-STD 883 Method 1018
QCI Group D1 Physical Dimensions QCI GroupD2 Lead Integrity
0/15
0/3
QCI Group D3 Thermal shocks - 15 cycles Temperature cycling - 100 cycles Moisture Resistance - 240 hours
0/15
QCI Group D4 Mechanical shocks Vibration at variable frequency Constant acceleration QCI Group D5 Salt atmosphere QCI Group D6 Internal vapor content
0/15
0/15
0/3
MIL-STD 883 Method 2025 MIL-STD 883 Method 2024
QCI Group D7 Lead finish adhesion QCI Group D8 Lid torque
0/15
0/5
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4.3 Wafer Process Qualification 4.3.1 Wafer Level Reliability
This chapter contains all the information relative to the reliability of the 0.35um AT56K technology, from which the MH1RT library has been derived. Results presented in the following sections concern the reliability of the basic process steps which build up the technology.
4.3.2 Hot carrier qualification
Gate Oxides of 70 ang and 110 ang were subjected to stress to determine lifetimes due to Hot Carrier Injection. The 70 ang oxide was subjected to a Vd = 3.6v for 10% IDSAT shift for a 10/.35um NMOS transistor. The DC results were .27 years which is equivalent to > 10 years for AC. (Source COS). The 110 ang oxide was subjected to Vgs=3v and Vds=6v with a 0.6um gate length. Again the failure criterion was 10% IDSAT shift. The DC results were 1.1 years, which is equivalent to much greater than 10 years for AC (Source ES2). Note: Spec = 0.2 years DC.
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4.3.3 Electromigration
Electromigration testing was performed on six structures, which included Contact, Metal 1, Via 1, Metal 2, Via 2, and Metal 3. The conditions of the tests were 2E06 current density at an ambient temperature of 200C. The testing was terminated at 1017 hours. With the exception of Metal 2, there were no failures. In order to estimate a minimum life expectancy for the zero failure tests, time to first failure is calculated as if occurring at 1017 hours of stress time. The following table summarizes the results of this testing: Considered TF Contact Metal 1 Via 1 Metal 2 Via 2 Metal 3 Tf 3.804% = 1017 hrs Tf 3.608% = 1017 hrs Tf 3.608% = 1017 hrs MTF = 513.734 hrs Tf 3.431% = 1017 hrs Tf 3.804% = 1017 hrs Stress Tempe rature 195.49 203.68 200.11 209.67 200.97 212.77 Current Density J 2E06 2E06 2E06 2E06 2E06 Ea / n Tf 0.1% (hrs) 272.7 2 279.3 6 279.3 6 32.20 Normalized Use Tf 0.1% 654 Years 670 Years 670 Years 77 Years
0.66 / 2 0.66 / 2 0.66 / 2 0.66 / 2 0.66 / 2
285.8 685 Years 5 2E06 0.66 / 2 272.7 654 Years 2 Source: ES2 - Serma Tech Report (2/19/99)
Note: Sample size for each structure = 20.
Additional Electromigration testing is ongoing. A sample of 15 devices with a straight line Metal 1 structure has been stressed for 300+ days at 200C and 3E06 Amps/cm2. To date 8 devices have failed. The estimated normalized Tf, 0.1% failure point is 2000 years. In addition Metal 3 testing is ongoing. There has been only 2 failures out of 15 devices after 60+ days of testing. The testing is being performed at 3.5E06 Amps/cm2 at 250C. Stress Temperature 200 250 Ea / n 0.6 / 2 0.6 / 2 Current Density J 3E06 3.5E06 Source: COS Tf 0.1% (hrs) 102 ongoing Normalized Use Tf 0.1% 2000 Years ongoing
Metal 1 Metal 3
Note: Sample size for each structure = 15. Note: The above Normalized Use conditions are based on specified Operating Temperatures of 110C and Operating Current Densities of 2E05.
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Time Dependent Dielectric Breakdown Gate oxide testing was performed on both 70 and 110 ang. A total of 750 samples were tested using the 70 ang oxide and a total of 500 samples were tested using the 110 ang oxide. Two tests were performed - the exponential current ramping test and the voltage ramping method. The following are the results of this testing: QBd Results (0.1 A/Cm2): Sample Size 70 ang Substrate Structure Nwell Structure 750 750 Sample Size 110 ang 500 500 % Defects below 1000 C/m2 70 ang 0.4% 0.4% Source: ES2 Note: Spec = 1.5%. % Defects below 1000 C/m2 110 ang 0% 0%
Ramping Voltage Results (2 V/s): Sample Size 70 ang Area Substrate Structure Area Well Structure Edge Substrate Structure Edge Well Structure 750 750 750 750 Sample Size 110 ang 500 500 500 500 Dola/Dolp 70 ang 0.09 0.13 0.01 0.01 Source: ES2 Note: Spec < 1. Dola/Dolp 110 ang 0.43 0.43 0.01 0.01
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4.3.4 Product Reliability Results
This section summarizes the cumulated AT56KRT technology reliability data.
Dynamic Operating Life Test A total of 100 samples were life tested at 140C . To date there have been no failures from this testing. See results below:
PART NUMBER EV29 MH1RT 65609E DRAF MH1242
LOT NUMBER E03624A A00422B A00650B
SAMPLE SIZE 45 45 10
TOTAL CKT HRS (K) 2000 2000 2000
AMBIENT TEMP (C) 140 140 140
Vcc (V) 3.7 3.7 3.7
FAILURES 0 0 0
60% Confidence Estimate @ 50C & 0.6eV = 2.8 FITs 95% Confidence Estimate @ 50C & 0.6eV = 9.1 FITs Early Failure Rate 48 hours @ 140C, 100 devices from 3 lots / 0 Failure
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4.4 Product Qualification 4.4.1 Device reliability
This section summarizes the cumulated qualification data of the MH1RT products.
Lots E03624A
Device Type/ Technology EV29 MH1RT test vehicle
Test Description ESD
Step 1000V 2000V 3000V 4000V
Result 0/3 0/3 0/3 0/3
Comment
E03624A
EV29 MH1RT test vehicle
Latch-up: Supply overvoltage Power injection
1.5*Vcc 50mW 12h 500h 1000h 2000h
0/5 0/5 0/45 0/45 0/45 0/45 0/45 0/45 0/45 0/45 0/10 0/10 0/10 0/10 0/10
E03624A
EV29 MH1RT test vehicle Package: Side Braze 28
Operating Life Test
A00422B
65609E 1MBIT SRAM SB32
Operating Life Test
0105h 0500h 1000h 2000h
A00650B
DRAF MH1242 MQFPF 256
Operating Life Test
12h 80h 500h 1000h 2000h
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4.4.2 Packaging Reliability
This section summarizes the packaging reliability data of the MH1RT products.
Lots E03624A
Device Type/ Technology EV29 MH1RT test vehicle Package: Side Braze 28
Test Description D3 Thermal Shocks
Step Elect. Visual Herm. Elect. Visual Herm. Elect. Visual Herm. Elect. Visual Herm.
Result 0/15 0/15 0/15 0/15 0/15 0/15 0/15 0/15 0/15 0/15 0/15 0/15
Comment
D4 Mechanical Shocks
A00422F
65609E 1 MBIT SRAM MQFPF 32
D3 Thermal Shocks
D4 Mechanical Shocks
4.5 Qualification status:
No failure noticed during MH1RT product qualification tests. MH1RT ASIC Sea of Gates library has been qualified on March 2000. MH1242 matrix tests allowed to extent the qualification domain up to the largest Sea of Gates size circuits.
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MH1RT QualPack
4.6 Irradiation 4.6.1 Conditions and Chronology
The irradiation, according to the requirements of the MIL STD 883E method 1019.5, and the Radiation Test Plan RTP085 is done using gamma rays from Cobalt 60 source using the EV29 test vehicle. The bias schematic is as defined in the radiation test plan. The temperature inside the irradiator chamber is 25C. In order to evaluate the influence of the internal bias of the device we decided to test 2 configurations. Half of the parts was initialized by loading the registers with 0 , the other half was initialized by loading the registers with 1. The irradiation sequence was fully static following the bias conditions defined in the RTP85. We affected the 18 parts following 5 distances in order to get 5 total dose set , which correspond to 5 dose rates during 20hours. Total dose 100Krads 200Krads 300Krads 400Krads 500Krads Init at 0 Sn1 Sn5 Sn8 Sn12 Sn15 Init at 0 Init at 0 Init at 1 Init at 1 Sn2 Sn3 Sn4 Sn6 Sn7 Sn9 Sn10 Sn11 Sn13 Sn14 Sn16 Sn17 Sn18 Comment
The dosimetry has been controlled with a PTW probe referenced by the Laboratoire National Henri Becquerel with a 10% accuracy. The chronology of events is listed in table 1. The parts (all leads in short circuit) are transferred to the test area after the end of the irradiation without bias. The annealing sequence has been conducted as follows : Storage at ambient temperature under bias. Electrical measurements at ambiant temperature until recovery of electrical parameters. Overtest (half total dose additional irradiation): Total dose 50Krads 100Krads 150Krads 200Krads 250Krads Init at 0 Sn1 Sn5 Sn8 Sn12 Sn15 Init at 0 Init at 0 Init at 1 Init at 1 Sn2 Sn3 Sn4 Sn6 Sn7 Sn9 Sn10 Sn11 Sn13 Sn14 Sn16 Sn17 Sn18 Comment
Storage at 100C under bias during 168 hours. Electrical measurements at ambient temperature.
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4.6.2 Results
All the parts passed the functional test even after 500krads irradiation provided the power supply can deliver the requested current (range 2A) A . ICCSB (in mA on the graphs) : It is the most sensitive parameter . The measurement is done following three conditions: ICCSB00 the registers are loaded with 0 ICCSB10 the registers are loaded with a queue 01010... ICCSB11 the registers are loaded with 1. It has to be noticed that where the parts were irradiated with registers to 0 ICCSB00 is 0 All the other configuration exhibit a large increase of ICCSB higher than 1amp (The 3 first measurements were clamped to 250mA); The 3 weeks ambient annealing shows a slow but significant recovery of the parameter . The 2 last additional weeks of annealing was in dynamic mode (clk active in low frequency) and thus the recovery is fully achieved. The additional half dose irradiation test confirms the previous behavior and the high temperature annealing leads to an almost full recovery of the parameter. B. Input leakages (in uA on the graphs), Only IIL is affected on the parts at 400krads and 500krads . This is recovered after annealing. C.Tpd (TP8 given as an example in ns), Input clamp voltages No significant change can be observed even after 500krads irradiation. D. Output voltages These parameters drift slightly due to irradiation but remains inside the specifications limits. The recovery is achieved after ambient bias annealing .
4.6.3 Irradiation summary
This test plan shows the high tolerance of the V29, MH1RT Test Vehicle to a total ionizing dose irradiation with Cobalt 60 gamma ray up to 500krads following the MIL STD 883 method 1019.5. The behavior noticed on the test vehicle during the qualification experiments can reasonably be predicted on the whole MH1RT product family.
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4.6.4 Irradiation test records
#1 #5 #6 0.012 0.01 0.008 0.006 0.004 0.002 0
INIT BIAS 25C BIAS 25C BIAS 25C BIAS 100C
ICCSB00 (IRR0)
ICCSB00 (IRR1)
1400 1200 1000 800 600 400 200 0
INIT BIAS 25C BIAS 25C BIAS 25C BIAS 100C
#3 #4 #7 #10 #11 #14 #18 Ref
#8 #9 #12 #13 #17 Ref
ICCSB10 (IRR0)
1200 1000 800 600 400 200 0
INIT BIAS 25C BIAS 25C BIAS 25C BIAS 100C
#1 #2 #5 #6 #8 #9 #12 #13 #15 #16 #17 Ref
ICCSB10(IR 1) R
#3 1200 1000 800 600 400 200 0
INIT IRR BIAS BIAS BIAS BIAS BIAS +0.5 BIAS 25C 25C 25C 25C 25C IRR 100C
#4 #7 #10 #11 #14 #18 Ref
ICCSB11 (IRR0)
1200 1000 800 600 400 200 0
INIT IRR BIAS BIAS BIAS BIAS BIAS +0.5 BIAS 25C 25C 25C 25C 25C IRR 100C
#1 #2 #5 #6 #8 #9 #12 #13 #15 #16 #17 Ref
800 700 600 500 400 300 200 100 0
ICCSB11 (IRR1)
#3 #4 #7 #10 #11 #14 #18
INIT IRR BIAS BIAS BIAS BIAS BIAS +0.5 BIAS 25C 25C 25C 25C 25C IRR 100C
Ref
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TP8 (IRR0)
4 3.5 3 2.5 2 1.5 1 0.5 0 1 2 3 4 5 6 7 8 9
#1 #2 #5 #6 #8 #9 #12 #13 #15 #16 #17 Ref
TP8 (IRR1)
2.2 2.1 2 1.9 1.8 1.7 1.6 1 2 3 4 5 6 7 8 #3 #4 #7 #10 #11 #18 Ref
IIL (IRR0)
1 0 -1 -2 -3 -4 -5 -6 -7 -8
#1 #2 #5 7 8 9 #6 #8 #9 #12 #13 #15 #16 #17 Ref
#1 #2 #5 #6 #8 #9 #12 #13 #15 #16 #17 Ref
IIL(IR 1 R)
0.015 0.01 0.005 0 -0.005 -0.01 -0.015 1 2 3 4 5 6 7 8 9 #3 #4 #7 #10 #14 #18 Rf e
1
2
3
4
5
6
VICH (IRR0)
0.49 0.48 0.47 0.46 0.45 0.44 0.43 0.42 0.41 1 2 3 4 5 6 7 8 9
VICH(IRR1)
0.49 0.48 0.47 0.46 0.45 0.44 0.43 0.42 0.41 1 2 3 4 5 6 7 8 9 #3 #4 #7 #10 #11 #14 #18 Ref
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VICL (IRR0)
-0.39 -0.4 -0.41 -0.42 -0.43 -0.44 -0.45 -0.46 -0.47 1 2 3 4 5 6 7 8 9 #1 #2 #5 #6 #8 #9 #12 #13 #15 #16 #17 Ref
-0.39 -0.4 -0.41 -0.42 -0.43 -0.44 -0.45 -0.46 -0.47 1 2 3
VICL (IRR1)
4 5 6 7 8 9
#3 #4 #7 #10 #11 #14 #18 Ref
VOH (IRR0)
#1 3 2.5 2 1.5 1 0.5 0 1 2 3 4 5 6 7 8 9 #2 #5 #6 #8 #9 #12 #13 #17 Ref
2.65 2.6 2.55 2.5 2.45 2.4 1 2 3 4
VOH (IRR1)
#3 #4 #7 #10 #11 #18 Ref 5 6 7 8 9
VOL (IRR0)
0.35 0.3 0.25 0.2 0.15 0.1 0.05 0 INIT BIAS 25C BIAS 25C BIAS 25C BIAS 100C
#1 #2 #5 #6 #8 #9 #12 #13 #15 #16 #17
0.25 0.2 0.15 0.1 0.05 0 1 2 3
VOL(IRR1)
#3 #4 #7 #10 #11 #18 4 5 6 7 8 9 Ref
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MH1RT QualPack 5. Environmental Information
Atmel Environmental Policy: Atmel is committed to providing a safe and healthy workplace and complying with all environmental regulations. Essential Elements Our environmental, health and safety goals are to prevent incidents that: Cause injury to our employees and visitors Harm the environment Cause property loss, and/or Result in business interruption Our goals also include a commitment to comply with environmental, health, and safety regulations, as well as a commitment to protect our human and natural resources. We believe that all accidents and undesirable environmental incidents are preventable. Furthermore, there is no job which should become so routine, or so urgent that it cannot be done safely and/or in an environmentally sound manner. Realization of these goals and objectives demand the support of every employee, at every level of the organization. Atmel employees must embrace this policy with the same spirit, commitment of resources, and intelligence, as we embrace customer satisfaction, product quality, and continuous improvement. As part of this corporate policy, Ozone Depleting Chemicals are being replaced either by Atmel Nantes or its sub-contractors. In addition the factory is committed in: - Reducing the use of harmful chemicals in its processes - Reducing the content of harmful materials in its products - Using recyclable materials wherever possible - Reducing the energy content of its products
Atmel Nantes is ISO14001 certified since May 2000.
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MH1RT QualPack 6. Other Data
6.1 ISO9001 and QS900 Certificates
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MH1RT QualPack
6.2 Data Book Reference
The data sheet is available upon request to sales representative or in Atmel site: http://www.atmel.com/ Data sheet: MH1RT 1.6M used gate Sea of Gates Rad Tolerant Address References All inquiries relating to this document should be addressed to the following: Atmel Nantes BP70602 44306 Nantes Cedex 3 France Telephone (33) 2 40 18 18 18 Telefax (33) 2 40 18 19 00 Or Direct contact Pascal LECUYER Product Assurance Manager Telephone (33) 2 40 18 17 73 Telefax (33) 2 40 18 19 00
Remarks:
The information given in this document is believed to be accurate and reliable. However, no responsibility is assumed by Atmel Nantes S.A. for its use. No specific guarantee or warranty is implied or given by this data unless agreed in writing elsewhere. Atmel Nantes S.A. reserves the right to update or modify this information without notification, at any time, in the interest of providing the latest information. Parts of this publication may be reproduced without special permission on the condition that our author and source are quoted and that two copies of such extracts are placed at our disposal after publication. Before use of such reproduced material the user should check that the information is current. Written permission must be obtained from the publisher for complete reprints or translations.
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